BCA TU Digital Logic Question Paper 2020
In the consecutive previous days we managed to upload all the question paper of BCA TU First Semester. Only the question paper of Digital Logic Year 2020 was left. Therefore today we are back with the question paper of Digital Logic Year 2020 and tomorrow combined / collection of all the question paper of the year 2020 will be uploaded.
You might already know about the subject Digital Logic therefore now we will not talk about the subject but only the question paper will be discussed. Below I have listed all the questions of group B and C with the marks of the questions covering. Please once go through it. Moreover the PDF is embedded below for your reference which you can download and keep for offline reading.
Group B Attempt any SIX questions. [6x5 = 30]
- 2. Define digital logic. Explain digital signal with its applications, advantages and disadvantages. [1 +4]
- 3. Define positional number system. [1] Calculate following:
- a) Subtract 21 from 35 using 2's complement method. [2)
- b) Convert (62.75)10 into single precision floating point format. [2]
- 4. Define universal gate. Explain Universal gates with their graphical symbol, algebraic expression, truth table, and Venn diagram. [1 + 4]
- 5. Define decoder. Explain binary to octal converter with block diagram, truth table and logic diagram. [1 +4]
- 6. Simplify the Boolean function F(w, x, y, z) = x(0, 2, 4, 6, 8, 10, 12, 14) and don't care conditions d(w,x, y, z) = n(1, 3, 9, I I) using K-Map method for both SOP and POS form. [2.5 + 2.5]
- 7. Define Multiplexer. Explain 4:1 multiplexer with its block diagram, truth table and logic diagram. [1 +4]
- 8. Write Short Notes on (Any two): [2.5 + 2.5]
- a) Parallel Adder b) PLA c) State Diagram
Group C Attempt any TWO questions. [240 = 20]
- 9. Explain JK and T Flip-flops with their logic diagram, graphical symbol, characteristic table, characteristic equation and excitation table. [5 + 5]
- 10. Differentiate between asynchronous and synchronous sequential circuits with example. Draw a block diagram, truth table and timing diagram to store 1001 in 4-bit SIPO register. [4 + 6]
- 11. Define counter. Write a procedure to design a counter circuit. Design MOD-8 up counter. [1+2+7]
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